selected publications
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academic article
- Reliability analysis of hybrid spin transfer torque magnetic tunnel junction/CMOS majority voters. Microelectronics Reliability. 64:48-53. 2016
- Breakdown Analysis of Magnetic Flip-Flop With 28-nm UTBB FDSOI Technology. IEEE Transactions on Device and Materials Reliability. 16:376-383. 2016
- Low Power Magnetic Flip-Flop Optimization With FDSOI Technology Boost. IEEE Transactions on Magnetics. 52:1-7. 2016
- Compact Model of Dielectric Breakdown in Spin-Transfer Torque Magnetic Tunnel Junction. IEEE Transactions on Electron Devices. 63:1762-1767. 2016
- Failure Analysis in Magnetic Tunnel Junction Nanopillar with Interfacial Perpendicular Magnetic Anisotropy. Materials. 9:41-41. 2016
- Ultra wide voltage range consideration of reliability-aware STT magnetic flip-flop in 28 nm FDSOI technology. Microelectronics Reliability. 55:1323-1327. 2015
- Compact thermal modeling of spin transfer torque magnetic tunnel junction. Microelectronics Reliability. 55:1649-1653. 2015
- Multiplexing Sense-Amplifier-Based Magnetic Flip-Flop in a 28-nm FDSOI Technology. IEEE Transactions on Nanotechnology. 14:761-767. 2015
- A dual-rail compact defect-tolerant multiplexer. Microelectronics Reliability. 55:662-670. 2015
- Accurate reliability analysis of concurrent checking circuits employing an efficient analytical method. Microelectronics Reliability. 55:696-703. 2015
- Cross-layer investigation of continuous-time sigma–delta modulator under aging effects. Microelectronics Reliability. 55:645-653. 2014
- Design for Reliability: Delay Faults Modeling and Simulation for CMOS Flip-Flops. International Journal of Microelectronics and Computer Science. 5. 2014
- A defect-tolerant area-efficient multiplexer for basic blocks in SRAM-based FPGAs. Microelectronics Reliability. 53:1189-1193. 2013
- Progressive module redundancy for fault-tolerant designs in nanoelectronics. Microelectronics Reliability. 51:1489-1492. 2011
- Fast reliability analysis of combinatorial logic circuits using conditional probabilities. Microelectronics Reliability. 50:1215-1218. 2010
- Using error tolerance of target application for efficient reliability improvement of digital circuits. Microelectronics Reliability. 50:1219-1222. 2010
- An efficient tool for reliability improvement based on TMR. Microelectronics Reliability. 50:1247-1250. 2010
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conference paper
- Practical metrics for evaluation of fault-tolerant logic design. . 569-573. 2017
- An energy efficient D2D LTE structure for PMR based on FlashLinQ. . 11-15. 2015
- D2D broadcast communications for 4G PMR networks. . 1-5. 2015
- An energy efficient vertical handover decision algorithm. 2022 IEEE Globecom Workshops (GC Wkshps). 1145-1150. 2014
- Battery-aware network discovery algorithm for mobile terminals within heterogeneous networks. . 2014
- A study of statistical variability-aware methods. . 1-3. 2014
- Analytical methods to assess transient faults effects in logic circuits. 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS). 667-670. 2014
- Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA. IEEE Computer Society Annual Symposium on VLSI. 553-558. 2014
- Efficient computation of combinational circuits reliability based on probabilistic transfer matrix. . 1-4. 2014
- A new fault-tolerant architecture for CLBs in SRAM-based FPGAs. 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS). 761-764. 2012
- Transient fault analysis of CORDIC processor. 2021 28th IEEE International Conference on Electronics, Circuits, and Systems (ICECS). 757-760. 2012
- Green solutions for future LTE PMR networks. . 165-167. 2012
- Majority voter: Signal probability, reliability and error bound characteristics. 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS). 538-541. 2012
- Reliability analysis of a Reed-Solomon decoder. 2022 IEEE 65th International Midwest Symposium on Circuits and Systems (MWSCAS). 438-441. 2012
- Analyzing and alleviating the impact of errors on an SRAM-based FPGA cluster. . 31-36. 2012
- Handling reconvergent paths using conditional probabilities in combinatorial logic netlist reliability estimation. . 263-267. 2010
- On the output events in concurrent error detection schemes. . 978-981. 2008
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